1. Field of the Invention
The present invention relates to a semiconductor memory device and a manufacturing method thereof.
2. Description of Related Art
A memory cell of a dynamic random access memory (DRAM) is composed of a capacitor region for storing charges and a transistor region for controlling a read and a write of information by the application of a gate electric voltage to the transistor region in order to govern the charges.
The memory capacity of the DRAM is required to increase more and more, and it has been demanded to further decrease the area of the memory cell and the size of capacitor region.
Among high density DRAMs, there are known a stack type DRAM and a trench type DRAM. In a stack type DRAM, a capacitor region is formed in an interlayer portion or in a side wall portion above the transistor region, while in a trench type DRAM, a capacitor region is formed in a trench side-wall formed in a silicon substrate, in order to get a capacitance value above a certain level. Refer for an example to H. Watanabe et al.: Stacked Capacitor Cell for High-Density Dynamic RAMs, IEDM Dig. of Tech. Papers p600(1988).
However, in the stack-type DRAM, as the area of the memory cell decreases, the area of the interlayer portion and the side wall portion forming the capacitor region also decreases so that the capacitance value becomes small. It may be possible to decrease the thickness of the capacitor insulating film or to use an insulating film of high dielectric constant for the capacitor region. However, these solutions cannot be adopted at present due to unreliability. On the other hand, in the trench-type DRAM, the capacitance value can be increased by deepening the trench. However, it is difficult to form a deep trench uniformly.